Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system

Ruben A. Zapatan, Pablo M. Lucero, Eduardo E. Armijos, Jonathan Coronel, Diego R. Cabrera

Research output: Contribution to conferencePaperResearch

Conference

ConferenceCHILECON 2015 - 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, Proceedings of IEEE Chilecon 2015
Period4/02/16 → …

Fingerprint

DC motors
Field programmable gate arrays (FPGA)
Neural networks
Sensors
RNA
Processing

Cite this

Zapatan, R. A., Lucero, P. M., Armijos, E. E., Coronel, J., & Cabrera, D. R. (2016). Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system. 931-935. Paper presented at CHILECON 2015 - 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, Proceedings of IEEE Chilecon 2015, . https://doi.org/10.1109/Chilecon.2015.7404684
Zapatan, Ruben A. ; Lucero, Pablo M. ; Armijos, Eduardo E. ; Coronel, Jonathan ; Cabrera, Diego R. / Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system. Paper presented at CHILECON 2015 - 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, Proceedings of IEEE Chilecon 2015, .5 p.
@conference{4712065bba7e4081bebf0457e0b15e71,
title = "Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system",
author = "Zapatan, {Ruben A.} and Lucero, {Pablo M.} and Armijos, {Eduardo E.} and Jonathan Coronel and Cabrera, {Diego R.}",
year = "2016",
month = "2",
day = "4",
doi = "10.1109/Chilecon.2015.7404684",
language = "English (US)",
pages = "931--935",
note = "CHILECON 2015 - 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, Proceedings of IEEE Chilecon 2015 ; Conference date: 04-02-2016",

}

Zapatan, RA, Lucero, PM, Armijos, EE, Coronel, J & Cabrera, DR 2016, 'Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system' Paper presented at CHILECON 2015 - 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, Proceedings of IEEE Chilecon 2015, 4/02/16, pp. 931-935. https://doi.org/10.1109/Chilecon.2015.7404684

Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system. / Zapatan, Ruben A.; Lucero, Pablo M.; Armijos, Eduardo E.; Coronel, Jonathan; Cabrera, Diego R.

2016. 931-935 Paper presented at CHILECON 2015 - 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, Proceedings of IEEE Chilecon 2015, .

Research output: Contribution to conferencePaperResearch

TY - CONF

T1 - Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system

AU - Zapatan, Ruben A.

AU - Lucero, Pablo M.

AU - Armijos, Eduardo E.

AU - Coronel, Jonathan

AU - Cabrera, Diego R.

PY - 2016/2/4

Y1 - 2016/2/4

U2 - 10.1109/Chilecon.2015.7404684

DO - 10.1109/Chilecon.2015.7404684

M3 - Paper

SP - 931

EP - 935

ER -

Zapatan RA, Lucero PM, Armijos EE, Coronel J, Cabrera DR. Implementation of a virtual velocity sensor for a DC motor through artificial neural networks in a FPGA system. 2016. Paper presented at CHILECON 2015 - 2015 IEEE Chilean Conference on Electrical, Electronics Engineering, Information and Communication Technologies, Proceedings of IEEE Chilecon 2015, . https://doi.org/10.1109/Chilecon.2015.7404684